The present invention relates to a semiconductor device, and in particular to a semiconductor device which is equipped with a plurality of semiconductor chips laminated in a single package and manufacturing method of such a semiconductor device.
In recent years, the downsizing and the improvement in terms of performance regarding a semiconductor device have been attempted by equipping a plurality of semiconductor chips (semiconductor elements) in a single package. For example, a package is equipped with a plurality of semiconductor chips laminated thereon for the purpose of adding an extra value to a memory which is equipped in a portable device or the like, or increasing its memory space.
A semiconductor device is made up of a semiconductor chip and a substrate. As a method of connecting these electrically, a wire bonding method is widely adopted, which makes a connection using bonding wires.
In the case of adopting the wire bonding method for connecting a semiconductor chip with a substrate, it is necessary to prevent damage to the wire bonded part of the semiconductor chip which was previously mounted on a substrate. Namely, the wire bonded part will not be damaged when the chip size of the laminating semiconductor chip is smaller than that of the semiconductor chip which was previously mounted on the substrate. However, in the case where the chip sizes of the two semiconductor chips are substantially the same, the wire bonded part overlaps the laminating semiconductor chip, thereby causing a problem that the bonded part is most likely to be damaged.
In order to solve the problem, the semiconductor devices described below have been proposed. A semiconductor device having a spacer of about 200 xcexcm (0.008 inch) sealed between the laminated semiconductor chips (U.S. Pat. No. Re. 36,613). A semiconductor device having an irregular structure in which the periphery is thinner than the center (Japanese Unexamined Patent Publication No. 244360/1994 (Tokukaihei 6-244360 published on Sep. 2, 1994). A semiconductor device which has an adhesion layer between the laminated semiconductor chips (Japanese Unexamined Patent Publication No. 27880/1998 (Tokukaihei 10-27880 published on Jan. 27, 1998).
However, these conventional semiconductor devices respectively cause problems described below.
In the semiconductor device having a spacer sealed between the laminated semiconductor chips, it is necessary to use a spacer having an adequate thickness for preventing contact between bonding wires connected to a semiconductor chip which is mounted on a substrate, and the laminating semiconductor chip. Thus, there is a problem that it is not suitable for downsizing the package.
Namely, as shown in FIG. 13, it is necessary to use a spacer 14 having an adequate thickness for preventing the contact between a second bonding wire 4 which connects a second semiconductor chip 2 and a substrate 7, and a first semiconductor chip 1. In other words, in the case where the spacer 14 is not thick enough to prevent contact between the highest part of the second bonding wire 4 from the second semiconductor chip 2 and the first semiconductor chip 1 as shown in FIG. 14, there arises a problem of inadequate insulation between the second bonding wire 4 and the first semiconductor chip 1.
Further, the first semiconductor chip 1 overhangs as shown in FIG. 13. In other words, the first semiconductor chip 1 protrudes from the spacer 14. Therefore, vibration is likely to occur on the first semiconductor chip 1. Here, in the wire bonding method which electrically connect a semiconductor chip to a substrate, two connecting processes are performed so as to connect both ends of a bonding wire, and the second connection is performed by ultrasonic wave vibration. As mentioned, since vibration is likely to occur on the first semiconductor chip 1, it is difficult to connect the first bonding wire 3 to the first semiconductor chips 1 by ultrasonic wave vibration. Consequently, it is necessary to connect one end of the first bonding wire 3 to the substrate 7 after connecting the other end of the first bonding wire 3 to the first semiconductor chip 1.
Namely, only the forward wire bonding method can be used for the wire bonding of the first semiconductor chip 1 which is mounted on the spacer 14. Accordingly, wire bonding terminals of the substrate 7 are required to be disposed more toward the edge of the substrate 7 in comparison with the case adopting the reverse wire bonding method. This results in a problem such that it is difficult to downsize the package. Note that, the forward wire bonding method is a method of connecting bonding wires and a substrate after connecting a semiconductor chip and the bonding wires. The reverse wire bonding method is a method of performing the connection in the reversed order.
As shown in FIG. 15, in the case of a semiconductor device having an irregular structure in which the periphery is thinner than the center, an extra cutting operation which cuts a semiconductor wafer to form irregularities is required in addition to the cutting operation of a semiconductor chip in comparison with the conventional process. Further, in the cutting operation, it is necessary to protect the opposite side of the surface on which the cutting operation is performed, i.e., the side on which elements bearing side of the semiconductor chip. This results in the problem of increased manufacturing cost.
Further, in this semiconductor device, the irregularities of the ninth semiconductor chip 51 are not insulated. Therefore, as shown in FIG. 16, there arises a problem of inadequate insulation between the second bonding wire 4 and the ninth semiconductor chip 51 when they contacted with each other in downsizing the package. Further, when the thickness of the ninth semiconductor chip 51 is reduced, the irregularities also become thin and the strength becomes weak. This may result in deficiencies such as a chip crack.
As with the structure having a spacer sealed between the laminated semiconductor chips, only the forward wire bonding method can be used for the wire bonding of the semiconductor chip having irregularities with the substrate. In using the forward wire bonding method, the height of the bonding wire to the semiconductor chip cannot be reduced, thereby posing a problem of difficulty in downsizing a semiconductor device when a plurality of semiconductor chips are laminated.
Further, as described, since only the forward wire bonding method is can be used, the wire bonding terminals of the substrate 7 are required to be disposed more toward the edge of the substrate 7, in comparison with the case adopting the reverse wire bonding method. This results in a problem of difficulty in downsizing a package.
As shown in FIG. 17, in the case of a structure which has an adhesion layer between the laminated semiconductor chips, it is difficult to control the thickness and the area of an adhesion layer 6 which adheres the first semiconductor chip 1 to the second semiconductor chip 2. This results in a problem of contamination of a substrate 7 by seeping (bleeding) of the adhesive which makes up the adhesion layer 6, or a problem of a tilt which occurs on the laminated first semiconductor chip 1.
Especially, in the case of laminating a plurality of semiconductor chips, stable production becomes difficult because the variation of height of the semiconductor device, the variation of height from the substrate to the surface of the top semiconductor chip, and the tilt of the top semiconductor chip increase. Namely, while the problem of variation and height does not become serious when laminating two semiconductor chips, the problem becomes serious as the number of the laminating chips becomes larger, such as three or four, because in this case the variation of height and the tilt increase to cause the problem of difficulty in stable production.
Further, as shown in FIG. 18, there also arises the problem of inadequate insulation between the second bonding wire 4 and the first semiconductor chip 1 when they contacted with each other in downsizing the package.
The present invention was made to solve the foregoing problems, and an object of the present invention is to provide a semiconductor device having ensured insulation and is capable of laminating semiconductor chips regardless of the chip size, and the manufacturing method thereof.
It is an object of the present invention to provide a semiconductor device having ensured insulation and is capable of laminating semiconductor chips regardless of the chip size, and a manufacturing method thereof.
In order to attain the foregoing object, a semiconductor device and a manufacturing method according to the present invention, a method of laminating semiconductor chips which have been prepared by dividing (cutting) a semiconductor wafer by dicing in a state where a resin layer of a bi-layer structure, which is made up of an insulation layer and an adhesion layer is affixed on the semiconductor wafer.
This makes it possible to manufacture a semiconductor device having small outer dimensions and ensured insulation with high productivity. Further, in the semiconductor device, the semiconductor chips can be laminated without avoiding the bonding wire part when laminating semiconductor chips, thereby laminating the semiconductor chips regardless of the chip size.
In order to attain the foregoing object, the semiconductor device according to the present invention includes a plurality of semiconductor chips which are laminated on a substrate, and electrode terminals provided on each semiconductor chip, which are electrically connected to the substrate by bonding wires, wherein an insulation layer is formed between the bonding wires and the semiconductor chip which is laminated on the semiconductor chip to which the bonding wires are connected.
With the foregoing arrangement, it is possible to prevent contact between the bonding wires and semiconductor chips. This ensures insulation of the semiconductor device having a plurality of laminated semiconductor chips.
In the semiconductor device having a plurality of laminated semiconductor chips, the semiconductor chips which are laminated on the substrate, are electrically connected to the substrate by the bonding wires via the electrode terminals which are provided on each of the semiconductor chip. Here, it is necessary to prevent contact between the bonding wires and semiconductor chips so as to ensure insulation of the semiconductor device. Especially, in order to downsize the semiconductor device, it is necessary to reduce the distance between the laminated semiconductor chips. However, in this case, inadequate insulation may occur since the distance between the bonding wires and semiconductor chips come close enough to contact each other.
This being the case, forming the insulation layer between the bonding wires and the semiconductor chip to which the bonding wires are connected prevents contact between the bonding wires and laminated semiconductor chips adjacent thereto. Namely, forming the insulation layer between electrode terminals of the semiconductor chip having bonding wires connected to the electrode terminals and the semiconductor chip which is adjacent to the semiconductor chip prevents contact between the bonding wires and the semiconductor chip which is adjacent to the semiconductor chip to which the bonding wires are connected.
Consequently, it becomes possible to ensure insulation of the semiconductor device having a plurality of laminated semiconductor chips. For example, even in the case of downsizing the semiconductor device by reducing the distance between the laminated semiconductor chips, the insulation layer prevents contact between the bonding wires and semiconductor chips, thereby ensuring insulation of the semiconductor device.
As described, in the semiconductor device having a plurality of semiconductor chips laminated on the substrate, it is possible to prevent inadequate insulation between the bonding wires and semiconductor chips. In other words, it is possible to ensure insulation of the semiconductor device since the insulation layer formed between the bonding wires and semiconductor chips prevents contact between the bonding wires and the semiconductor chips.
Consequently, ensuring insulation of the semiconductor device having a plurality of semiconductor chips laminated on the substrate makes it possible to provide a semiconductor device having high reliability and ensured insulation even in the case where the outer dimensions of the device are reduced.
Additional objects, features, and strengths of the present invention will be made clear by the description below. Further, the advantages of the present invention will be evident from the following explanation in reference to the drawings.